1. Field of the Invention
The present invention pertains to the field of circuit design emulation. More particularly, this invention relates to the subject of scaling an emulation system.
2. Background
With advances in integrated circuit technology, various tools have been developed to aid circuit designers in designing and debugging highly complex integrated circuits. In particular, emulation systems comprising reconfigurable emulation resources such as reconfigurable logic chips, reconfigurable interconnects, and so forth, have been developed for circuit designers to quickly xe2x80x9crealizexe2x80x9d their designs and emulate operation of the circuits.
Great advances have been made in the art of sub-micron integration in recent years, resulting in significantly more complex integrated circuits are being designed. In turn, it has become necessary for emulation system manufacturers to supply very large emulation systems capable of emulating these highly complex integrated circuits. At the same time, since it has become possible to integrate an entire system on a chip, increasingly, at the other end of the spectrum, ASIC designers are turning to pre-designed function blocks, allowing the ASIC designers to concentrate on the design of the incremental custom logic, which often constitutes only a small portion of the whole chip. As a result, a need also exists for the emulation system manufacturers to provide small to medium size emulation systems for these ASIC designers. In between, various sizes of emulation systems are desired. In order for an emulation manufacturer to be able to meet this increasingly wide range of capability demands in a cost effective and efficient manner, it has become highly desirable for an emulation system manufacturer to be able to flexibly scale and package emulation systems of different sizes from fundamentally the same architecture.
A scalable emulation system is disclosed. The basic embodiment of the emulation system includes a number of logic boards with logic chips that are reconfigurable to emulate circuit elements of a circuit design. The basic embodiment further includes a number of interconnect boards coupled to at least the logic boards. Each of the interconnect boards includes interconnect chips that are reconfigurable to selectively interconnect the logic chips of different ones of the logic boards. Additionally, at least each of a subset of the interconnect boards includes a number of expansion connectors for facilitating expansion of the emulation system in one or more selected ones of expansion orientations through coupling of at least one or more substantial replicates of the basic embodiment.